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    First name: Rachata
    Last name: Ausavarungnirun
    DBLP: 117/0573
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    Journal article
    Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Saugata Ghose, Onur Mutlu.
    Reducing DRAM Latency by Exploiting Design-Induced Latency Variation in Modern DRAM Chips.
    CoRR 2016, Volume 0 (0) 2016
    Conference paper
    Onur Kayiran, Adwait Jog, Ashutosh Pattnaik, Rachata Ausavarungnirun, Xulong Tang, Mahmut T. Kandemir, Gabriel H. Loh, Onur Mutlu, Chita R. Das.
    μC-States: Fine-grained GPU Datapath Power Management.
    Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, PACT 2016, Haifa, Israel, September 11-15, 2016 2016 (0) 2016
    Journal article
    Rachata Ausavarungnirun, Chris Fallin, Xiangyao Yu, Kevin Kai-Wei Chang, Greg Nazario, Reetuparna Das, Gabriel H. Loh, Onur Mutlu.
    A case for hierarchical rings with deflection routing: An energy-efficient on-chip communication substrate.
    Parallel Computing 2016, Volume 54 (0) 2016
    Conference paper
    Yang Li, Di Wang, Saugata Ghose, Jie Liu, Sriram Govindan, Sean James, Eric Peterson, John Siegler, Rachata Ausavarungnirun, Onur Mutlu.
    SizeCap: Efficiently handling power surges in fuel cell powered data centers.
    2016 IEEE International Symposium on High Performance Computer Architecture, HPCA 2016, Barcelona, Spain, March 12-16, 2016 2016 (0) 2016
    Journal article
    Nandita Vijaykumar, Gennady Pekhimenko, Adwait Jog, Saugata Ghose, Abhishek Bhowmick 0002, Rachata Ausavarungnirun, Chita R. Das, Mahmut T. Kandemir, Todd C. Mowry, Onur Mutlu.
    A Framework for Accelerating Bottlenecks in GPU Execution with Assist Warps.
    CoRR 2016, Volume 0 (0) 2016
    Journal article
    Rachata Ausavarungnirun, Chris Fallin, Xiangyao Yu, Kevin Kai-Wei Chang, Greg Nazario, Reetuparna Das, Gabriel H. Loh, Onur Mutlu.
    Achieving both High Energy Efficiency and High Performance in On-Chip Communication using Hierarchical Rings with Deflection Routing.
    CoRR 2016, Volume 0 (0) 2016
    Conference paper
    Rachata Ausavarungnirun, Saugata Ghose, Onur Kayiran, Gabriel H. Loh, Chita R. Das, Mahmut T. Kandemir, Onur Mutlu.
    Exploiting Inter-Warp Heterogeneity to Improve GPGPU Performance.
    2015 International Conference on Parallel Architecture and Compilation, PACT 2015, San Francisco, CA, USA, October 18-21, 2015 2015 (0) 2015
    Conference paper
    Donghyuk Lee, Lavanya Subramanian, Rachata Ausavarungnirun, Jongmoo Choi, Onur Mutlu.
    Decoupled Direct Memory Access: Isolating CPU and IO Traffic by Leveraging a Dual-Data-Port DRAM.
    2015 International Conference on Parallel Architecture and Compilation, PACT 2015, San Francisco, CA, USA, October 18-21, 2015 2015 (0) 2015
    Conference paper
    Mohammad Fattah, Antti Airola, Rachata Ausavarungnirun, Nima Mirzaei, Pasi Liljeberg, Juha Plosila, Siamak Mohammadi, Tapio Pahikkala, Onur Mutlu, Hannu Tenhunen.
    A Low-Overhead, Fully-Distributed, Guaranteed-Delivery Routing Algorithm for Faulty Network-on-Chips.
    Proceedings of the 9th International Symposium on Networks-on-Chip, NOCS 2015, Vancouver, BC, Canada, September 28-30, 2015 2015 (0) 2015
    Conference paper
    Nandita Vijaykumar, Gennady Pekhimenko, Adwait Jog, Abhishek Bhowmick 0002, Rachata Ausavarungnirun, Chita R. Das, Mahmut T. Kandemir, Todd C. Mowry, Onur Mutlu.
    A case for core-assisted bottleneck acceleration in GPUs: enabling flexible data compression with assist warps.
    Proceedings of the 42nd Annual International Symposium on Computer Architecture, Portland, OR, USA, June 13-17, 2015 2015 (0) 2015
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