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    Author information
    First name: Yoongu
    Last name: Kim
    DBLP: 70/4287
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    Show item 1 to 19 of 19  
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    Conference paper
    Yoongu Kim, Weikun Yang, Onur Mutlu.
    Ramulator: A Fast and Extensible DRAM Simulator.
    Computer Architecture Letters 2016, Volume 15 (0) 2016
    Journal article
    Yoongu Kim, Ross Daly, Jeremie Kim, Chris Fallin, Ji-Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, Onur Mutlu.
    RowHammer: Reliability Analysis and Security Implications.
    CoRR 2016, Volume 0 (0) 2016
    Journal article
    Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Manabi Khan, Vivek Seshadri, Kevin Kai-Wei Chang, Onur Mutlu.
    Adaptive-Latency DRAM (AL-DRAM).
    CoRR 2016, Volume 0 (0) 2016
    Journal article
    Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu.
    Tiered-Latency DRAM (TL-DRAM).
    CoRR 2016, Volume 0 (0) 2016
    Journal article
    Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu.
    Reducing Performance Impact of DRAM Refresh by Parallelizing Refreshes with Accesses.
    CoRR 2016, Volume 0 (0) 2016
    Conference paper
    Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Manabi Khan, Vivek Seshadri, Kevin Kai-Wei Chang, Onur Mutlu.
    Adaptive-latency DRAM: Optimizing DRAM timing for the common-case.
    21st IEEE International Symposium on High Performance Computer Architecture, HPCA 2015, Burlingame, CA, USA, February 7-11, 2015 2015 (0) 2015
    Conference paper
    Yoongu Kim, Ross Daly, Jeremie Kim, Chris Fallin, Ji-Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, Onur Mutlu.
    Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors.
    ACM/IEEE 41st International Symposium on Computer Architecture, ISCA 2014, Minneapolis, MN, USA, June 14-18, 2014 2014 (0) 2014
    Conference paper
    Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu.
    Improving DRAM performance by parallelizing refreshes with accesses.
    20th IEEE International Symposium on High Performance Computer Architecture, HPCA 2014, Orlando, FL, USA, February 15-19, 2014 2014 (0) 2014
    Book chapter
    Yoongu Kim, Onur Mutlu.
    Memory Systems.
    Computing Handbook, Third Edition: Computer Science and Software Engineering 2014 (0) 2014
    Conference paper
    Samira Manabi Khan, Donghyuk Lee, Yoongu Kim, Alaa R. Alameldeen, Chris Wilkerson, Onur Mutlu.
    The efficacy of error mitigation techniques for DRAM retention failures: a comparative experimental study.
    ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems, SIGMETRICS '14, Austin, TX, USA - June 16 - 20, 2014 2014 (0) 2014
    Conference paper
    Gennady Pekhimenko, Vivek Seshadri, Yoongu Kim, Hongyi Xin, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry.
    Linearly compressed pages: a low-complexity, low-latency main memory compression framework.
    The 46th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-46, Davis, CA, USA, December 7-11, 2013 2013 (0) 2013
    Conference paper
    Vivek Seshadri, Yoongu Kim, Chris Fallin, Donghyuk Lee, Rachata Ausavarungnirun, Gennady Pekhimenko, Yixin Luo, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry.
    RowClone: fast and energy-efficient in-DRAM bulk data copy and initialization.
    The 46th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-46, Davis, CA, USA, December 7-11, 2013 2013 (0) 2013
    Conference paper
    Jamie Liu, Ben Jaiyen, Yoongu Kim, Chris Wilkerson, Onur Mutlu.
    An experimental study of data retention behavior in modern DRAM devices: implications for retention time profiling mechanisms.
    The 40th Annual International Symposium on Computer Architecture, ISCA'13, Tel-Aviv, Israel, June 23-27, 2013 2013 (0) 2013
    Conference paper
    Lavanya Subramanian, Vivek Seshadri, Yoongu Kim, Ben Jaiyen, Onur Mutlu.
    MISE: Providing performance predictability and improving fairness in shared main memory systems.
    19th IEEE International Symposium on High Performance Computer Architecture, HPCA 2013, Shenzhen, China, February 23-27, 2013 2013 (0) 2013
    Conference paper
    Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu.
    Tiered-latency DRAM: A low latency and low cost DRAM architecture.
    19th IEEE International Symposium on High Performance Computer Architecture, HPCA 2013, Shenzhen, China, February 23-27, 2013 2013 (0) 2013
    Conference paper
    Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Liu, Onur Mutlu.
    A case for exploiting subarray-level parallelism (SALP) in DRAM.
    39th International Symposium on Computer Architecture (ISCA 2012), June 9-13, 2012, Portland, OR, USA 2012 (0) 2012
    Journal article
    Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor Harchol-Balter.
    Thread Cluster Memory Scheduling.
    IEEE Micro 2011, Volume 31 (0) 2011
    Conference paper
    Yoongu Kim, Dongsu Han, Onur Mutlu, Mor Harchol-Balter.
    ATLAS: A scalable and high-performance scheduling algorithm for multiple memory controllers.
    16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 9-14 January 2010, Bangalore, India 2010 (0) 2010
    Conference paper
    Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor Harchol-Balter.
    Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior.
    43rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2010, 4-8 December 2010, Atlanta, Georgia, USA 2010 (0) 2010
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