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    First name: Saugata
    Last name: Ghose
    DBLP: 94/7357
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    Journal article
    Nandita Vijaykumar, Gennady Pekhimenko, Adwait Jog, Saugata Ghose, Abhishek Bhowmick 0002, Rachata Ausavarungnirun, Chita R. Das, Mahmut T. Kandemir, Todd C. Mowry, Onur Mutlu.
    A Framework for Accelerating Bottlenecks in GPU Execution with Assist Warps.
    CoRR 2016, Volume 0 (0) 2016
    Conference paper
    Xi-Yue Xiang, Saugata Ghose, Onur Mutlu, Nian-Feng Tzeng.
    A model for Application Slowdown Estimation in on-chip networks and its use for improving system fairness and performance.
    34th IEEE International Conference on Computer Design, ICCD 2016, Scottsdale, AZ, USA, October 2-5, 2016 2016 (0) 2016
    Conference paper
    Kevin Hsieh, Samira Manabi Khan, Nandita Vijaykumar, Kevin K. Chang, Amirali Boroumand, Saugata Ghose, Onur Mutlu.
    Accelerating pointer chasing in 3D-stacked memory: Challenges, mechanisms, evaluation.
    34th IEEE International Conference on Computer Design, ICCD 2016, Scottsdale, AZ, USA, October 2-5, 2016 2016 (0) 2016
    Conference paper
    Xi-Yue Xiang, Wentao Shi, Saugata Ghose, Lu Peng, Onur Mutlu, Nian-Feng Tzeng.
    Carpool: a bufferless on-chip network supporting adaptive multicast and hotspot alleviation.
    Proceedings of the International Conference on Supercomputing, ICS 2017, Chicago, IL, USA, June 14-16, 2017 2017 (0) 2017
    Journal article
    Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu.
    Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms.
    POMACS 2017, Volume 1 (0) 2017
    Conference paper
    Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu.
    Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms.
    Proceedings of the 2017 ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems, Urbana-Champaign, IL, USA, June 05 - 09, 2017 2017 (0) 2017
    Conference paper
    Yixin Luo, Saugata Ghose, Yu Cai, Erich F. Haratsch, Onur Mutlu.
    Enabling Accurate and Practical Online Flash Channel Modeling for Modern MLC NAND Flash Memory.
    IEEE Journal on Selected Areas in Communications 2016, Volume 34 (0) 2016
    Journal article
    Yu Cai, Saugata Ghose, Erich F. Haratsch, Yixin Luo, Onur Mutlu.
    Error Characterization, Mitigation, and Recovery in Flash Memory Based Solid-State Drives.
    CoRR 2017, Volume 0 (0) 2017
    Conference paper
    Rachata Ausavarungnirun, Saugata Ghose, Onur Kayiran, Gabriel H. Loh, Chita R. Das, Mahmut T. Kandemir, Onur Mutlu.
    Exploiting Inter-Warp Heterogeneity to Improve GPGPU Performance.
    2015 International Conference on Parallel Architecture and Compilation, PACT 2015, San Francisco, CA, USA, October 18-21, 2015 2015 (0) 2015
    Conference paper
    Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Kevin Hsieh, Krishna T. Malladi, Hongzhong Zheng, Onur Mutlu.
    LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory.
    Computer Architecture Letters 2017, Volume 16 (0) 2017
    Journal article
    Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Nastaran Hajinazar, Kevin Hsieh, Krishna T. Malladi, Hongzhong Zheng, Onur Mutlu.
    LazyPIM: Efficient Support for Cache Coherence in Processing-in-Memory Architectures.
    CoRR 2017, Volume 0 (0) 2017
    Conference paper
    Kevin K. Chang, Prashant J. Nair, Donghyuk Lee, Saugata Ghose, Moinuddin K. Qureshi, Onur Mutlu.
    Low-Cost Inter-Linked Subarrays (LISA): Enabling fast inter-subarray data movement in DRAM.
    2016 IEEE International Symposium on High Performance Computer Architecture, HPCA 2016, Barcelona, Spain, March 12-16, 2016 2016 (0) 2016
    Journal article
    Yang Li, Jongmoo Choi, Jin Sun, Saugata Ghose, Hui Wang, Justin Meza, Jinglei Ren, Onur Mutlu.
    Managing Hybrid Main Memories with a Page-Utility Driven Performance Model.
    CoRR 2015, Volume 0 (0) 2015
    Conference paper
    Yu Cai, Yixin Luo, Saugata Ghose, Onur Mutlu.
    Read Disturb Errors in MLC NAND Flash Memory: Characterization, Mitigation, and Recovery.
    45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2015, Rio de Janeiro, Brazil, June 22-25, 2015 2015 (0) 2015
    Journal article
    Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Saugata Ghose, Onur Mutlu.
    Reducing DRAM Latency by Exploiting Design-Induced Latency Variation in Modern DRAM Chips.
    CoRR 2016, Volume 0 (0) 2016
    Journal article
    Donghyuk Lee, Gennady Pekhimenko, Samira Manabi Khan, Saugata Ghose, Onur Mutlu.
    Simultaneous Multi Layer Access: A High Bandwidth and Low Cost 3D-Stacked Memory Interface.
    CoRR 2015, Volume 0 (0) 2015
    Conference paper
    Donghyuk Lee, Saugata Ghose, Gennady Pekhimenko, Samira Manabi Khan, Onur Mutlu.
    Simultaneous Multi-Layer Access: Improving 3D-Stacked Memory Bandwidth at Low Cost.
    TACO 2015, Volume 12 (0) 2016
    Conference paper
    Yang Li, Di Wang, Saugata Ghose, Jie Liu, Sriram Govindan, Sean James, Eric Peterson, John Siegler, Rachata Ausavarungnirun, Onur Mutlu.
    SizeCap: Efficiently handling power surges in fuel cell powered data centers.
    2016 IEEE International Symposium on High Performance Computer Architecture, HPCA 2016, Barcelona, Spain, March 12-16, 2016 2016 (0) 2016
    Conference paper
    Hasan Hassan, Nandita Vijaykumar, Samira Manabi Khan, Saugata Ghose, Kevin K. Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin, Onur Mutlu.
    SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies.
    2017 IEEE International Symposium on High Performance Computer Architecture, HPCA 2017, Austin, TX, USA, February 4-8, 2017 2017 (0) 2017
    Conference paper
    Kevin K. Chang, Abhijith Kashyap, Hasan Hassan, Saugata Ghose, Kevin Hsieh, Donghyuk Lee, Tianshi Li, Gennady Pekhimenko, Samira Manabi Khan, Onur Mutlu.
    Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization.
    Proceedings of the 2016 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Science, Antibes Juan-Les-Pins, France, June 14-18, 2016 2016 (0) 2016
    Conference paper
    Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu.
    Understanding Reduced-Voltage Operation in Modern DRAM Chips: Characterization, Analysis, and Mechanisms.
    CoRR 2017, Volume 0 (0) 2017
    Journal article
    Kevin K. Chang, A. Giray Yaalikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu.
    Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms.
    POMACS 2017, Volume 1 (0) 2017
    Conference paper
    Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu.
    Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms.
    Proceedings of the 2017 ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems, Urbana-Champaign, IL, USA, June 05 - 09, 2017 2017 (0) 2017
    Journal article
    Yixin Luo, Saugata Ghose, Tianshi Li, Sriram Govindan, Bikash Sharma, Bryan Kelly, Amirali Boroumand, Onur Mutlu.
    Using ECC DRAM to Adaptively Increase Memory Capacity.
    CoRR 2017, Volume 0 (0) 2017
    Conference paper
    Yu Cai, Saugata Ghose, Yixin Luo, Ken Mai, Onur Mutlu, Erich F. Haratsch.
    Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques.
    2017 IEEE International Symposium on High Performance Computer Architecture, HPCA 2017, Austin, TX, USA, February 4-8, 2017 2017 (0) 2017
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