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    First name: Mahmut T.
    Last name: Kandemir
    DBLP: k/MahmutTKandemir
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    Conference paper
    Adwait Jog, Onur Kayiran, Ashutosh Pattnaik, Mahmut T. Kandemir, Onur Mutlu, Ravishankar Iyer, Chita R. Das.
    Exploiting Core Criticality for Enhanced GPU Performance.
    Proceedings of the 2016 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Science, Antibes Juan-Les-Pins, France, June 14-18, 2016 2016 (0) 2016
    Journal article
    Nandita Vijaykumar, Gennady Pekhimenko, Adwait Jog, Saugata Ghose, Abhishek Bhowmick 0002, Rachata Ausavarungnirun, Chita R. Das, Mahmut T. Kandemir, Todd C. Mowry, Onur Mutlu.
    A Framework for Accelerating Bottlenecks in GPU Execution with Assist Warps.
    CoRR 2016, Volume 0 (0) 2016
    Conference paper
    Rachata Ausavarungnirun, Saugata Ghose, Onur Kayiran, Gabriel H. Loh, Chita R. Das, Mahmut T. Kandemir, Onur Mutlu.
    Exploiting Inter-Warp Heterogeneity to Improve GPGPU Performance.
    2015 International Conference on Parallel Architecture and Compilation, PACT 2015, San Francisco, CA, USA, October 18-21, 2015 2015 (0) 2015
    Conference paper
    Nandita Vijaykumar, Gennady Pekhimenko, Adwait Jog, Abhishek Bhowmick 0002, Rachata Ausavarungnirun, Chita R. Das, Mahmut T. Kandemir, Todd C. Mowry, Onur Mutlu.
    A case for core-assisted bottleneck acceleration in GPUs: enabling flexible data compression with assist warps.
    Proceedings of the 42nd Annual International Symposium on Computer Architecture, Portland, OR, USA, June 13-17, 2015 2015 (0) 2015
    Conference paper
    Onur Kayiran, Nachiappan Chidambaram Nachiappan, Adwait Jog, Rachata Ausavarungnirun, Mahmut T. Kandemir, Gabriel H. Loh, Onur Mutlu, Chita R. Das.
    Managing GPU Concurrency in Heterogeneous Architectures.
    47th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2014, Cambridge, United Kingdom, December 13-17, 2014 2014 (0) 2014
    Conference paper
    Emre Kultursay, Mahmut T. Kandemir, Anand Sivasubramaniam, Onur Mutlu.
    Evaluating STT-RAM as an energy-efficient main memory alternative.
    2012 IEEE International Symposium on Performance Analysis of Systems Software, Austin, TX, USA, 21-23 April, 2013 2013 (0) 2013
    Conference paper
    Adwait Jog, Onur Kayiran, Asit K. Mishra, Mahmut T. Kandemir, Onur Mutlu, Ravishankar Iyer, Chita R. Das.
    Orchestrated scheduling and prefetching for GPGPUs.
    The 40th Annual International Symposium on Computer Architecture, ISCA'13, Tel-Aviv, Israel, June 23-27, 2013 2013 (0) 2013
    Conference paper
    Adwait Jog, Onur Kayiran, Nachiappan Chidambaram Nachiappan, Asit K. Mishra, Mahmut T. Kandemir, Onur Mutlu, Ravishankar Iyer, Chita R. Das.
    OWL: cooperative thread array aware scheduling techniques for improving GPGPU performance.
    Architectural Support for Programming Languages and Operating Systems, ASPLOS '13, Houston, TX, USA - March 16 - 20, 2013 2013 (0) 2013
    Conference paper
    Nachiappan Chidambaram Nachiappan, Asit K. Mishra, Mahmut T. Kandemir, Anand Sivasubramaniam, Onur Mutlu, Chita R. Das.
    Application-aware prefetch prioritization in on-chip networks.
    International Conference on Parallel Architectures and Compilation Techniques, PACT '12, Minneapolis, MN, USA - September 19 - 23, 2012 2012 (0) 2012
    Conference paper
    Sai Prashanth Muralidhara, Lavanya Subramanian, Onur Mutlu, Mahmut T. Kandemir, Thomas Moscibroda.
    Reducing memory interference in multicore systems via application-aware memory channel partitioning.
    44rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2011, Porto Alegre, Brazil, December 3-7, 2011 2011 (0) 2011
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