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    First name: Onur
    Last name: Mutlu
    DBLP: m/OnurMutlu
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    Conference paper
    Hyesoon Kim, M. Aater Suleman, Onur Mutlu, Yale N. Patt.
    2D-Profiling: Detecting Input-Dependent Branches with a Single Input Data Set.
    Fourth IEEE/ACM International Symposium on Code Generation and Optimization (CGO 2006), 26-29 March 2006, New York, New York, USA 2006 (0) 2006
    Conference paper
    Thomas Moscibroda, Onur Mutlu.
    A case for bufferless routing in on-chip networks.
    36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA 2009 (0) 2009
    Conference paper
    Nandita Vijaykumar, Gennady Pekhimenko, Adwait Jog, Abhishek Bhowmick 0002, Rachata Ausavarungnirun, Chita R. Das, Mahmut T. Kandemir, Todd C. Mowry, Onur Mutlu.
    A case for core-assisted bottleneck acceleration in GPUs: enabling flexible data compression with assist warps.
    Proceedings of the 42nd Annual International Symposium on Computer Architecture, Portland, OR, USA, June 13-17, 2015 2015 (0) 2015
    Conference paper
    Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Liu, Onur Mutlu.
    A case for exploiting subarray-level parallelism (SALP) in DRAM.
    39th International Symposium on Computer Architecture (ISCA 2012), June 9-13, 2012, Portland, OR, USA 2012 (0) 2012
    Journal article
    Rachata Ausavarungnirun, Chris Fallin, Xiangyao Yu, Kevin Kai-Wei Chang, Greg Nazario, Reetuparna Das, Gabriel H. Loh, Onur Mutlu.
    A case for hierarchical rings with deflection routing: An energy-efficient on-chip communication substrate.
    Parallel Computing 2016, Volume 54 (0) 2016
    Conference paper
    Moinuddin K. Qureshi, Daniel N. Lynch, Onur Mutlu, Yale N. Patt.
    A Case for MLP-Aware Cache Replacement.
    33rd International Symposium on Computer Architecture (ISCA 2006), June 17-21, 2006, Boston, MA, USA 2006 (0) 2006
    Conference paper
    Justin Meza, Jing Li 0002, Onur Mutlu.
    A case for small row buffers in non-volatile main memories.
    30th International IEEE Conference on Computer Design, ICCD 2012, Montreal, QC, Canada, September 30 - Oct. 3, 2012 2012 (0) 2012
    Conference paper
    Gennady Pekhimenko, Evgeny Bolotin, Nandita Vijaykumar, Onur Mutlu, Todd C. Mowry, Stephen W. Keckler.
    A case for toggle-aware compression for GPU systems.
    2016 IEEE International Symposium on High Performance Computer Architecture, HPCA 2016, Barcelona, Spain, March 12-16, 2016 2016 (0) 2016
    Conference paper
    Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco.
    A Flexible Software-Based Framework for Online Detection of Hardware Defects.
    IEEE Trans. Computers 2009, Volume 58 (0) 2009
    Journal article
    Nandita Vijaykumar, Gennady Pekhimenko, Adwait Jog, Saugata Ghose, Abhishek Bhowmick 0002, Rachata Ausavarungnirun, Chita R. Das, Mahmut T. Kandemir, Todd C. Mowry, Onur Mutlu.
    A Framework for Accelerating Bottlenecks in GPU Execution with Assist Warps.
    CoRR 2016, Volume 0 (0) 2016
    Conference paper
    Asit K. Mishra, Onur Mutlu, Chita R. Das.
    A heterogeneous multiple network-on-chip design: an application-aware approach.
    The 50th Annual Design Automation Conference 2013, DAC '13, Austin, TX, USA, May 29 - June 07, 2013 2013 (0) 2013
    Conference paper
    Justin Meza, Qiang Wu, Sanjev Kumar, Onur Mutlu.
    A Large-Scale Study of Flash Memory Failures in the Field.
    Proceedings of the 2015 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, Portland, OR, USA, June 15-19, 2015 2015 (0) 2015
    Conference paper
    Mohammad Fattah, Antti Airola, Rachata Ausavarungnirun, Nima Mirzaei, Pasi Liljeberg, Juha Plosila, Siamak Mohammadi, Tapio Pahikkala, Onur Mutlu, Hannu Tenhunen.
    A Low-Overhead, Fully-Distributed, Guaranteed-Delivery Routing Algorithm for Faulty Network-on-Chips.
    Proceedings of the 9th International Symposium on Networks-on-Chip, NOCS 2015, Vancouver, BC, Canada, September 28-30, 2015 2015 (0) 2015
    Conference paper
    Xi-Yue Xiang, Saugata Ghose, Onur Mutlu, Nian-Feng Tzeng.
    A model for Application Slowdown Estimation in on-chip networks and its use for improving system fairness and performance.
    34th IEEE International Conference on Computer Design, ICCD 2016, Scottsdale, AZ, USA, October 2-5, 2016 2016 (0) 2016
    Conference paper
    Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu.
    A QoS-Enabled On-Die Interconnect Fabric for Kilo-Node Chips.
    IEEE Micro 2012, Volume 32 (0) 2012
    Conference paper
    Junwhan Ahn, Sungpack Hong, Sungjoo Yoo, Onur Mutlu, Kiyoung Choi.
    A scalable processing-in-memory accelerator for parallel graph processing.
    Proceedings of the 42nd Annual International Symposium on Computer Architecture, Portland, OR, USA, June 13-17, 2015 2015 (0) 2015
    Journal article
    Reetuparna Das, Onur Mutlu, Thomas Moscibroda, Chita R. Das.
    Aérgia: A Network-on-Chip Exploiting Packet Latency Slack.
    IEEE Micro 2011, Volume 31 (0) 2011
    Conference paper
    Reetuparna Das, Onur Mutlu, Thomas Moscibroda, Chita R. Das.
    Aérgia: exploiting packet latency slack in on-chip networks.
    37th International Symposium on Computer Architecture (ISCA 2010), June 19-23, 2010, Saint-Malo, France 2010 (0) 2010
    Conference paper
    Hui Wang, Canturk Isci, Lavanya Subramanian, Jongmoo Choi, Depei Qian, Onur Mutlu.
    A-DRM: Architecture-aware Distributed Resource Management of Virtualized Clusters.
    Proceedings of the 11th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, Istanbul, Turkey, March 14-15, 2015 2015 (0) 2015
    Conference paper
    M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, Yale N. Patt.
    Accelerating critical section execution with asymmetric multi-core architectures.
    Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2009, Washington, DC, USA, March 7-11, 2009 2009 (0) 2009
    Journal article
    M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, Yale N. Patt.
    Accelerating Critical Section Execution with Asymmetric Multicore Architectures.
    IEEE Micro 2010, Volume 30 (0) 2010
    Conference paper
    Milad Hashemi, Khubaib, Eiman Ebrahimi, Onur Mutlu, Yale N. Patt.
    Accelerating Dependent Cache Misses with an Enhanced Memory Controller.
    43rd ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2016, Seoul, South Korea, June 18-22, 2016 2016 (0) 2016
    Conference paper
    Kevin Hsieh, Samira Manabi Khan, Nandita Vijaykumar, Kevin K. Chang, Amirali Boroumand, Saugata Ghose, Onur Mutlu.
    Accelerating pointer chasing in 3D-stacked memory: Challenges, mechanisms, evaluation.
    34th IEEE International Conference on Computer Design, ICCD 2016, Scottsdale, AZ, USA, October 2-5, 2016 2016 (0) 2016
    Journal article
    Hongyi Xin, Donghyuk Lee, Farhad Hormozdiari, Samihan Yedkar, Onur Mutlu, Can Alkan.
    Accelerating read mapping with FastHASH.
    BMC Genomics 2013, Volume 14 (0) 2013
    Journal article
    Rachata Ausavarungnirun, Chris Fallin, Xiangyao Yu, Kevin Kai-Wei Chang, Greg Nazario, Reetuparna Das, Gabriel H. Loh, Onur Mutlu.
    Achieving both High Energy Efficiency and High Performance in On-Chip Communication using Hierarchical Rings with Deflection Routing.
    CoRR 2016, Volume 0 (0) 2016
    Journal article
    Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Manabi Khan, Vivek Seshadri, Kevin Kai-Wei Chang, Onur Mutlu.
    Adaptive-Latency DRAM (AL-DRAM).
    CoRR 2016, Volume 0 (0) 2016
    Conference paper
    Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Manabi Khan, Vivek Seshadri, Kevin Kai-Wei Chang, Onur Mutlu.
    Adaptive-latency DRAM: Optimizing DRAM timing for the common-case.
    21st IEEE International Symposium on High Performance Computer Architecture, HPCA 2015, Burlingame, CA, USA, February 7-11, 2015 2015 (0) 2015
    Conference paper
    Onur Mutlu, Hyesoon Kim, Yale N. Patt.
    Address-Value Delta (AVD) Prediction: A Hardware Technique for Efficiently Parallelizing Dependent Cache Misses.
    IEEE Trans. Computers 2006, Volume 55 (0) 2006
    Conference paper
    Onur Mutlu, Hyesoon Kim, Yale N. Patt.
    Address-Value Delta (AVD) Prediction: Increasing the Effectiveness of Runahead Execution by Exploiting Regular Memory Allocation Patterns.
    38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain 2005 (0) 2005
    Conference paper
    Dongwoo Kang, Seungjae Baek, Jongmoo Choi, Donghee Lee, Sam H. Noh, Onur Mutlu.
    Amnesic cache management for non-volatile memory.
    IEEE 31st Symposium on Mass Storage Systems and Technologies, MSST 2015, Santa Clara, CA, USA, May 30 - June 5, 2015 2015 (0) 2015
    Conference paper
    Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt.
    An Analysis of the Performance Impact of Wrong-Path Memory References on Out-of-Order and Runahead Execution Processors.
    IEEE Trans. Computers 2005, Volume 54 (0) 2005
    Conference paper
    Jamie Liu, Ben Jaiyen, Yoongu Kim, Chris Wilkerson, Onur Mutlu.
    An experimental study of data retention behavior in modern DRAM devices: implications for retention time profiling mechanisms.
    The 40th Annual International Symposium on Computer Architecture, ISCA'13, Tel-Aviv, Israel, June 23-27, 2013 2013 (0) 2013
    Conference paper
    Nachiappan Chidambaram Nachiappan, Asit K. Mishra, Mahmut T. Kandemir, Anand Sivasubramaniam, Onur Mutlu, Chita R. Das.
    Application-aware prefetch prioritization in on-chip networks.
    International Conference on Parallel Architectures and Compilation Techniques, PACT '12, Minneapolis, MN, USA - September 19 - 23, 2012 2012 (0) 2012
    Conference paper
    Reetuparna Das, Onur Mutlu, Thomas Moscibroda, Chita R. Das.
    Application-aware prioritization mechanisms for on-chip networks.
    42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA 2009 (0) 2009
    Conference paper
    Reetuparna Das, Rachata Ausavarungnirun, Onur Mutlu, Akhilesh Kumar, Mani Azimi.
    Application-to-core mapping policies to reduce memory interference in multi-core systems.
    International Conference on Parallel Architectures and Compilation Techniques, PACT '12, Minneapolis, MN, USA - September 19 - 23, 2012 2012 (0) 2012
    Conference paper
    Reetuparna Das, Rachata Ausavarungnirun, Onur Mutlu, Akhilesh Kumar, Mani Azimi.
    Application-to-core mapping policies to reduce memory system interference in multi-core systems.
    19th IEEE International Symposium on High Performance Computer Architecture, HPCA 2013, Shenzhen, China, February 23-27, 2013 2013 (0) 2013
    Conference paper
    Benjamin C. Lee, Engin Ipek, Onur Mutlu, Doug Burger.
    Architecting phase change memory as a scalable dram alternative.
    36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA 2009 (0) 2009
    Conference paper
    Yoongu Kim, Dongsu Han, Onur Mutlu, Mor Harchol-Balter.
    ATLAS: A scalable and high-performance scheduling algorithm for multiple memory controllers.
    16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 9-14 January 2010, Bangalore, India 2010 (0) 2010
    Conference paper
    Moinuddin K. Qureshi, Dae-Hyun Kim, Samira Manabi Khan, Prashant J. Nair, Onur Mutlu.
    AVATAR: A Variable-Retention-Time (VRT) Aware Refresh for DRAM Systems.
    45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2015, Rio de Janeiro, Brazil, June 22-25, 2015 2015 (0) 2015
    Journal article
    Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, Onur Mutlu, Srinivas Devadas.
    Banshee: Bandwidth-Efficient DRAM Caching Via Software/Hardware Cooperation.
    CoRR 2017, Volume 0 (0) 2017
    Conference paper
    Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry.
    Base-delta-immediate compression: practical data compression for on-chip caches.
    International Conference on Parallel Architectures and Compilation Techniques, PACT '12, Minneapolis, MN, USA - September 19 - 23, 2012 2012 (0) 2012
    Conference paper
    Lavanya Subramanian, Donghyuk Lee, Vivek Seshadri, Harsha Rastogi, Onur Mutlu.
    BLISS: Balancing Performance, Fairness and Complexity in Memory Access Scheduling.
    IEEE Trans. Parallel Distrib. Syst. 2016, Volume 27 (0) 2016
    Conference paper
    José A. Joao, M. Aater Suleman, Onur Mutlu, Yale N. Patt.
    Bottleneck identification and scheduling in multithreaded applications.
    Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2012, London, UK, March 3-7, 2012 2012 (0) 2012
    Conference paper
    Hyoseung Kim, Dionisio de Niz, Björn Andersson, Mark H. Klein, Onur Mutlu, Ragunathan Rajkumar.
    Bounding and reducing memory interference in COTS-based multi-core systems.
    Real-Time Systems 2016, Volume 52 (0) 2016
    Conference paper
    Hyoseung Kim, Dionisio de Niz, Björn Andersson, Mark H. Klein, Onur Mutlu, Ragunathan Rajkumar.
    Bounding memory interference delay in COTS-based multi-core systems.
    20th IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2014, Berlin, Germany, April 15-17, 2014 2014 (0) 2014
    Journal article
    Vivek Seshadri, Donghyuk Lee, Thomas Mullins, Hasan Hassan, Amirali Boroumand, Jeremie Kim, Michael A. Kozuch, Onur Mutlu, Phillip B. Gibbons, Todd C. Mowry.
    Buddy-RAM: Improving the Performance and Efficiency of Bulk Bitwise Operations Using DRAM.
    CoRR 2016, Volume 0 (0) 2016
    Conference paper
    Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt.
    Cache Filtering Techniques to Reduce the Negative Impact of Useless Speculative Memory References on Processor Performance.
    16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2004), 27-29 October 2004, Foz do Iguacu, Brazil 2004 (0) 2004
    Conference paper
    Xi-Yue Xiang, Wentao Shi, Saugata Ghose, Lu Peng, Onur Mutlu, Nian-Feng Tzeng.
    Carpool: a bufferless on-chip network supporting adaptive multicast and hotspot alleviation.
    Proceedings of the International Conference on Supercomputing, ICS 2017, Chicago, IL, USA, June 14-16, 2017 2017 (0) 2017
    Journal article
    Vivek Seshadri, Onur Mutlu.
    Chapter Four - Simple Operations in Memory to Reduce Data Movement.
    Advances in Computers 2017, Volume 105 (0) 2017
    Conference paper
    Yixin Luo, Sriram Govindan, Bikash Sharma, Mark Santaniello, Justin Meza, Aman Kansal, Jie Liu, Badriddine M. Khessib, Kushagra Vaid, Onur Mutlu.
    Characterizing Application Memory Error Vulnerability to Optimize Datacenter Cost via Heterogeneous-Reliability Memory.
    44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2014, Atlanta, GA, USA, June 23-26, 2014 2014 (0) 2014
    Conference paper
    Hasan Hassan, Gennady Pekhimenko, Nandita Vijaykumar, Vivek Seshadri, Donghyuk Lee, Oguz Ergin, Onur Mutlu.
    ChargeCache: Reducing DRAM latency by exploiting row access locality.
    2016 IEEE International Symposium on High Performance Computer Architecture, HPCA 2016, Barcelona, Spain, March 12-16, 2016 2016 (0) 2016
    Conference paper
    Chris Fallin, Chris Craik, Onur Mutlu.
    CHIPPER: A low-complexity bufferless deflection router.
    17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), February 12-16 2011, San Antonio, Texas, USA 2011 (0) 2011
    Conference paper
    Onur Mutlu, Richard A. Belgard, Thomas R. Gross, Norman P. Jouppi, John L. Hennessy, Steven A. Przybylski, Chris Rowen, Yale N. Patt, Wen-Mei W. Hwu, Stephen W. Melvin, Michael Shebanow, Tse-Yu Yeh, Andy Wolfe.
    Common Bonds: MIPS, HPS, Two-Level Branch Prediction, and Compressed Code RISC Processor.
    IEEE Micro 2016, Volume 36 (0) 2016
    Conference paper
    Yu Cai, Ken Mai, Onur Mutlu.
    Comparative evaluation of FPGA and ASIC implementations of bufferless and buffered routing algorithms for on-chip networks.
    Sixteenth International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, CA, USA, March 2-4, 2015 2015 (0) 2015
    Conference paper
    Yanjing Li, Onur Mutlu, Donald S. Gardner, Subhasish Mitra.
    Concurrent autonomous self-test for uncore components in system-on-chips.
    28th IEEE VLSI Test Symposium, VTS 2010, April 19-22, 2010, Santa Cruz, California, USA 2010 (0) 2010
    Conference paper
    Zhiyu Liu, Irina Calciu, Maurice Herlihy, Onur Mutlu.
    Concurrent Data Structures for Near-Memory Computing.
    Proceedings of the 29th ACM Symposium on Parallelism in Algorithms and Architectures, SPAA 2017, Washington DC, USA, July 24-26, 2017 2017 (0) 2017
    Conference paper
    Milad Hashemi, Onur Mutlu, Yale N. Patt.
    Continuous runahead: Transparent hardware acceleration for memory intensive workloads.
    49th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2016, Taipei, Taiwan, October 15-19, 2016 2016 (0) 2016
    Conference paper
    Eiman Ebrahimi, Onur Mutlu, Chang Joo Lee, Yale N. Patt.
    Coordinated control of multiple prefetchers in multi-core systems.
    42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA 2009 (0) 2009
    Conference paper
    Hiroyuki Usui, Lavanya Subramanian, Kevin Kai-Wei Chang, Onur Mutlu.
    DASH: Deadline-Aware High-Performance Memory Scheduler for Heterogeneous Systems with Hardware Accelerators.
    TACO 2015, Volume 12 (0) 2016
    Conference paper
    M. Aater Suleman, Onur Mutlu, José A. Joao, Khubaib, Yale N. Patt.
    Data marshaling for multi-core architectures.
    37th International Symposium on Computer Architecture (ISCA 2010), June 19-23, 2010, Saint-Malo, France 2010 (0) 2010
    Journal article
    M. Aater Suleman, Onur Mutlu, José A. Joao, Khubaib, Yale N. Patt.
    Data Marshaling for Multicore Systems.
    IEEE Micro 2011, Volume 31 (0) 2011
    Conference paper
    Yu Cai, Yixin Luo, Erich F. Haratsch, Ken Mai, Onur Mutlu.
    Data retention in MLC NAND flash memory: Characterization, optimization, and recovery.
    21st IEEE International Symposium on High Performance Computer Architecture, HPCA 2015, Burlingame, CA, USA, February 7-11, 2015 2015 (0) 2015
    Conference paper
    Donghyuk Lee, Lavanya Subramanian, Rachata Ausavarungnirun, Jongmoo Choi, Onur Mutlu.
    Decoupled Direct Memory Access: Isolating CPU and IO Traffic by Leveraging a Dual-Data-Port DRAM.
    2015 International Conference on Parallel Architecture and Compilation, PACT 2015, San Francisco, CA, USA, October 18-21, 2015 2015 (0) 2015
    Conference paper
    Rachata Ausavarungnirun, Chris Fallin, Xiangyao Yu, Kevin Kai-Wei Chang, Greg Nazario, Reetuparna Das, Gabriel H. Loh, Onur Mutlu.
    Design and Evaluation of Hierarchical Rings with Deflection Routing.
    26th IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2014, Paris, France, October 22-24, 2014 2014 (0) 2014
    Journal article
    Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu.
    Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms.
    POMACS 2017, Volume 1 (0) 2017
    Conference paper
    Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu.
    Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms.
    Proceedings of the 2017 ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems, Urbana-Champaign, IL, USA, June 05 - 09, 2017 2017 (0) 2017
    Conference paper
    Thomas Moscibroda, Onur Mutlu.
    Distributed order scheduling and its application to multi-core dram controllers.
    Proceedings of the Twenty-Seventh Annual ACM Symposium on Principles of Distributed Computing, PODC 2008, Toronto, Canada, August 18-21, 2008 2008 (0) 2008
    Conference paper
    Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt.
    Diverge-Merge Processor (DMP): Dynamic Predicated Execution of Complex Control-Flow Graphs Based on Frequently Executed Paths.
    39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 9-13 December 2006, Orlando, Florida, USA 2006 (0) 2006
    Conference paper
    Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt.
    Diverge-Merge Processor: Generalized and Energy-Efficient Dynamic Predication.
    IEEE Micro 2007, Volume 27 (0) 2007
    Journal article
    José A. Joao, Onur Mutlu, Hyesoon Kim, Yale N. Patt.
    Dynamic Predication of Indirect Jumps.
    Computer Architecture Letters 2008, Volume 7 (0) 2007
    Conference paper
    José A. Joao, Onur Mutlu, Hyesoon Kim, Yale N. Patt.
    Dynamic Predication of Indirect Jumps.
    Computer Architecture Letters 2007, Volume 6 (0) 2007
    Conference paper
    HanBin Yoon, Justin Meza, Naveen Muralimanohar, Norman P. Jouppi, Onur Mutlu.
    Efficient Data Mapping and Buffering Techniques for Multilevel Cell Phase-Change Memories.
    TACO 2014, Volume 11 (0) 2014
    Conference paper
    Onur Mutlu, Hyesoon Kim, Yale N. Patt.
    Efficient Runahead Execution: Power-Efficient Memory Latency Tolerance.
    IEEE Micro 2006, Volume 26 (0) 2006
    Conference paper
    Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Onur Mutlu, Mateo Valero.
    Efficient runahead threads.
    19th International Conference on Parallel Architecture and Compilation Techniques, PACT 2010, Vienna, Austria, September 11-15, 2010 2010 (0) 2010
    Conference paper
    Chuanjun Zhang, Glenn G. Ko, Jungwook Choi, Shang-nien Tsai, Minje Kim, Abner Guzmán-Rivera, Rob A. Rutenbar, Paris Smaragdis, Mi Sun Park, Narayanan Vijaykrishnan, Hongyi Xin, Onur Mutlu, Bin Li, Li Zhao, Mei Chen.
    EMERALD: Characterization of emerging applications and algorithms for low-power devices.
    2012 IEEE International Symposium on Performance Analysis of Systems Software, Austin, TX, USA, 21-23 April, 2013 2013 (0) 2013
    Conference paper
    Yixin Luo, Saugata Ghose, Yu Cai, Erich F. Haratsch, Onur Mutlu.
    Enabling Accurate and Practical Online Flash Channel Modeling for Modern MLC NAND Flash Memory.
    IEEE Journal on Selected Areas in Communications 2016, Volume 34 (0) 2016
    Conference paper
    Justin Meza, Jichuan Chang, HanBin Yoon, Onur Mutlu, Parthasarathy Ranganathan.
    Enabling Efficient and Scalable Hybrid Memories Using Fine-Granularity DRAM Cache Management.
    Computer Architecture Letters 2012, Volume 11 (0) 2012
    Conference paper
    Kevin Kai-Wei Chang, Gabriel H. Loh, Mithuna Thottethodi, Yasuko Eckert, Mike O'Connor, Srilatha Manne, Lisa Hsu, Lavanya Subramanian, Onur Mutlu.
    Enabling Efficient Dynamic Resizing of Large DRAM Caches via A Hardware Consistent Hashing Mechanism.
    CoRR 2016, Volume 0 (0) 2016
    Journal article
    Yu Cai, Saugata Ghose, Erich F. Haratsch, Yixin Luo, Onur Mutlu.
    Error Characterization, Mitigation, and Recovery in Flash Memory Based Solid-State Drives.
    CoRR 2017, Volume 0 (0) 2017
    Conference paper
    Yu Cai, Erich F. Haratsch, Onur Mutlu, Ken Mai.
    Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis.
    2012 Design, Automation Test in Europe Conference Exhibition, DATE 2012, Dresden, Germany, March 12-16, 2012 2012 (0) 2012
    Conference paper
    Emre Kultursay, Mahmut T. Kandemir, Anand Sivasubramaniam, Onur Mutlu.
    Evaluating STT-RAM as an energy-efficient main memory alternative.
    2012 IEEE International Symposium on Performance Analysis of Systems Software, Austin, TX, USA, 21-23 April, 2013 2013 (0) 2013
    Conference paper
    Gennady Pekhimenko, Tyler Huberty, Rui Cai, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry.
    Exploiting compressed block size as an indicator of future reuse.
    21st IEEE International Symposium on High Performance Computer Architecture, HPCA 2015, Burlingame, CA, USA, February 7-11, 2015 2015 (0) 2015
    Conference paper
    Adwait Jog, Onur Kayiran, Ashutosh Pattnaik, Mahmut T. Kandemir, Onur Mutlu, Ravishankar Iyer, Chita R. Das.
    Exploiting Core Criticality for Enhanced GPU Performance.
    Proceedings of the 2016 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Science, Antibes Juan-Les-Pins, France, June 14-18, 2016 2016 (0) 2016
    Conference paper
    Rachata Ausavarungnirun, Saugata Ghose, Onur Kayiran, Gabriel H. Loh, Chita R. Das, Mahmut T. Kandemir, Onur Mutlu.
    Exploiting Inter-Warp Heterogeneity to Improve GPGPU Performance.
    2015 International Conference on Parallel Architecture and Compilation, PACT 2015, San Francisco, CA, USA, October 18-21, 2015 2015 (0) 2015
    Conference paper
    Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu.
    Express Cube Topologies for on-Chip Interconnects.
    15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 14-18 February 2009, Raleigh, North Carolina, USA 2009 (0) 2009
    Conference paper
    Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N. Patt.
    Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems.
    Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2010, Pittsburgh, Pennsylvania, USA, March 13-17, 2010 2010 (0) 2010
    Conference paper
    Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N. Patt.
    Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multicore Memory Systems.
    ACM Trans. Comput. Syst. 2012, Volume 30 (0) 2012
    Conference paper
    Vivek Seshadri, Kevin Hsieh, Amirali Boroumand, Donghyuk Lee, Michael A. Kozuch, Onur Mutlu, Phillip B. Gibbons, Todd C. Mowry.
    Fast Bulk Bitwise AND and OR in DRAM.
    Computer Architecture Letters 2015, Volume 14 (0) 2015
    Conference paper
    Santhosh Srinath, Onur Mutlu, Hyesoon Kim, Yale N. Patt.
    Feedback Directed Prefetching: Improving the Performance and Bandwidth-Efficiency of Hardware Prefetchers.
    13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 10-14 February 2007, Phoenix, Arizona, USA 2007 (0) 2007
    Conference paper
    Jishen Zhao, Onur Mutlu, Yuan Xie 0001.
    FIRM: Fair and High-Performance Memory Control for Persistent Memory Systems.
    47th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2014, Cambridge, United Kingdom, December 13-17, 2014 2014 (0) 2014
    Conference paper
    Michael Papamichael, James C. Hoe, Onur Mutlu.
    FIST: A fast, lightweight, FPGA-friendly packet latency estimator for NoC modeling in full-system simulations.
    NOCS 2011, Fifth ACM/IEEE International Symposium on Networks-on-Chip, Pittsburgh, Pennsylvania, USA, May 1-4, 2011 2011 (0) 2011
    Conference paper
    Yu Cai, Gulay Yalcin, Onur Mutlu, Erich F. Haratsch, Adrián Cristal, Osman S. Unsal, Ken Mai.
    Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime.
    30th International IEEE Conference on Computer Design, ICCD 2012, Montreal, QC, Canada, September 30 - Oct. 3, 2012 2012 (0) 2012
    Conference paper
    José A. Joao, Onur Mutlu, Yale N. Patt.
    Flexible reference-counting-based hardware acceleration for garbage collection.
    36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA 2009 (0) 2009
    Conference paper
    Yoongu Kim, Ross Daly, Jeremie Kim, Chris Fallin, Ji-Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, Onur Mutlu.
    Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors.
    ACM/IEEE 41st International Symposium on Computer Architecture, ISCA 2014, Minneapolis, MN, USA, June 14-18, 2014 2014 (0) 2014
    Conference paper
    Kaan Kara, Dan Alistarh, Gustavo Alonso, Onur Mutlu, Ce Zhang.
    FPGA-Accelerated Dense Linear Machine Learning: A Precision-Convergence Trade-Off.
    25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2017, Napa, CA, USA, April 30 - May 2, 2017 2017 (0) 2017
    Conference paper
    Kevin Hsieh, Aaron Harlap, Nandita Vijaykumar, Dimitris Konomis, Gregory R. Ganger, Phillip B. Gibbons, Onur Mutlu.
    Gaia: Geo-Distributed Machine Learning Approaching LAN Speeds.
    14th USENIX Symposium on Networked Systems Design and Implementation, NSDI 2017, Boston, MA, USA, March 27-29, 2017 2017 (0) 2017
    Journal article
    Mohammed Alser, Hasan Hassan, Hongyi Xin, Oguz Ergin, Onur Mutlu, Can Alkan.
    GateKeeper: Enabling Fast Pre-Alignment in DNA Short Read Mapping with a New Streaming Accelerator Architecture.
    CoRR 2016, Volume 0 (0) 2016
    Conference paper
    Vivek Seshadri, Thomas Mullins, Amirali Boroumand, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry.
    Gather-scatter DRAM: in-DRAM address translation to improve the spatial locality of non-unit strided accesses.
    Proceedings of the 48th International Symposium on Microarchitecture, MICRO 2015, Waikiki, HI, USA, December 5-9, 2015 2015 (0) 2015
    Conference paper
    Sangyeun Cho, Tao Li, Onur Mutlu.
    Guest Editors' Introduction: Interaction of Many-Core Computer Architecture and Operating Systems.
    IEEE Micro 2008, Volume 28 (0) 2008
    Conference paper
    Kevin Kai-Wei Chang, Rachata Ausavarungnirun, Chris Fallin, Onur Mutlu.
    HAT: Heterogeneous Adaptive Throttling for On-Chip Networks.
    IEEE 24th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2012, New York, NY, USA, October 24-26, 2012 2012 (0) 2012
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