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Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms.

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    Title: Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms.
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    Date: 2017
    Publication type: Conference paper
    Authors:
    No. First name Last name Show
    1. Donghyuk Lee
    2. Samira Manabi Khan
    3. Lavanya Subramanian
    4. Saugata Ghose
    5. Rachata Ausavarungnirun
    6. Gennady Pekhimenko
    7. Vivek Seshadri
    8. Onur Mutlu
    Download (by DOI): 10.1145/3078505.3078533
    BibTeX: conf/sigmetrics/LeeKSGAPSM17
    DBLP: db/conf/sigmetrics/sigmetrics2017.html#LeeKSGAPSM17
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    Conference
    Name: Proceedings of the 2017 ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems, Urbana-Champaign, IL, USA, June 05 - 09, 2017 2017
    URL: http://doi.acm.org/10.1145/3078505
    DBLP: db/conf/sigmetrics/sigmetrics2017.html